AXY:PLS On/Off delay

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PLS (Programmable Limit Switch) is a mechanism by which a system output is triggered when a specified position is reached.

The Problem

In application the use of PLS is to control an external device. Can be a situation that there is an asymmetric behavior in enabling and disabling timing of the device. As the indication to PLS is the position without dependency on the external device there can be a case when the disabling (for example) takes longer the enable and finished later then expected.

Solution offered

The solution is by different time delays that will be define for enable and disable. This timing will be taken into consider when calculating the timing when the PLS has to be set. Again if the disable timing is Tdis then the PLS has to be set Tdis before the original PLS position is reached.

Limitation

See also

Manz's Bugs related to this issue:

Issue 5151Bugzilla icon.png F: asymmetric plspropagationdelay